Publications
FY2015
Conferences
Invited talks at international conference
32 | T. Hanyu, “Spintronics-Based Logic-in-Memory Architecture Towards Dark Silicon Era,” International Workshop: Spintronics VLSI, Sendai, Japan, November 21, 2015. |
31 | H. Koike, Y. Ma, and T. Endoh, “High-Density and Low-Power Applications of Spintronics Circuits: 1T1MTJ-MRAM Array Design, and 4T2MTJ-MRAM-based Pattern Recognition Processor”, International Workshop: Spintronics VLSI, Sendai, Japan, November 21, 2015. |
30 | S. Fukami, C. Zhang, S. DuttaGupta, Aleksandr Kurenkov, and Hideo Ohno, “Spin-orbit torque switching for three-terminal spintronics devices,” 13th RIEC International Workshop on Spintronics, Sendai, Japan, November 19, 2015. |
29 | H. Sato, E.C.I. Enobio, N. Ohshima, S. Fukami, F. Matsukura, and H. Ohno, “Perpendicular-anisotropy CoFeB-MgO magnetic tunnel junctions for low power consumption non-volatile VLSI”, 3rd Tohoku University KTH Joint Workshop, KTH, Sweden, November 13, 2015. |
28 | S. DuttaGupta, S. Fukami, M. Yamanouchi, C. Zhang, H. Sato, F. Matsukura, and H. Ohno, “Universality class for adiabatic spin-transfer torque induced domain wall creep in magnetic metal”, JSPS Core-to-Core Workshop on New-Concept Spintronic Devices , Sendai, Japan, November 13, 2015. |
27 | T. Endoh, “Novel High Performance NV-Working Memory with Spintronics and Vertical MOSFET Technology”, International Workshop on Radiation Effects on Semiconductor Devices for Space Applications(11th RASEDA), Gunma, Japan, November 13, 2015. |
26 | H. Ohno, “Spintronics materials and devices for nonvolatile CMOS VLSIs”, 16th RIES-Hokudai International Symposium, Sapporo, Japan, November 11, 2015. |
25 | H. Ohno, “Spintronics Nano-Devices for Nonvolatile VLSIs ”, Electrical and Computer Engineering and Materials University of California & California NanoSystems Institute (CNSI), California, USA, October 15, 2015. |
24 | T. Hanyu, M. Natsui, D. Suzuki, A. Mochizuki, N. Onizawa, S. Ikeda, T. Endoh and H. Ohno, “Challenge of MTJ-Based Nonvolatile Logic-in-Memory Architecture for Ultra Low-Power and Highly Dependable VLSI Computing”, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (2015 IEEE S3S Conference), California, USA, October 6, 2015. |
23 | H. Sato, E.C.I. Enobio, S. Fukami, F. Matsukura, and H. Ohno, “Properties of perpendicular-anisotropy magnetic tunnel junctions with single and double CoFeB-MgO interface”, 6th Annual Conference on Magnetics, NTU, Singapore, October 2, 2015. |
22 | S. Fukami, H. Sato, and H. Ohno, “Spintronics memory devices for ultralow-power and high-performance integrated circuits”, 2015 International Conference on Solid State Devices and Materials (SSDM2015), Sapporo, Japan, September 29, 2015. |
21 | H. Ohno, “Nonvolatile VLSI Made Possible by Spintronics”, 4th Winton Symposium, Cambridge, UK, September 28, 2015. |
20 | H. Ohno, “Spintronics Nano-Devices for Nonvolatile VLSIs “, 12th Sweden-Japan QNANO Workshop, Hindas, Sweden, September 24, 2015. |
19 | S. Fukami, H. Ohno, “Spin-orbit torque induced magnetization switching for three-terminal spintronics devices”, 2nd Spin, Waves and Interactions, Greifswald, Germany, September 10, 2015. |
18 | S. Fukami, H. Sato and H. Ohno, “Spintronics memory devices for ultralow-power and high-performance integrated circuits”, 2015 International Conference on Solid State Devices and Materials(2015 SSDM), Sapporo, Japan, September 29, 2015. |
17 | H. Ohno, “Nano-Spintronics Devices for VLSI Integration”, Gordon Research Conference, Hong Kong, Republic of China, July 26, 2015. |
16 | H. Ohno, “Nanoscale Spintronics Materials and Devices”, 8th International Conference on Materials for Advanced Technologies of the Materials Research Society of Singapore & 16th IMURS – International Conference in Asia Together with 4th Photonics Global Conference 2015(ICMAT&IUMRS-ICA2015), Singapore, July 2, 2015. |
15 | H. Ohno, “Spintronics for Stand-by Power Free VLSI”, 8th International Conference on Materials for Advanced Technologies of the Materials Research Society of Singapore & 16th IMURS – International Conference in Asia Together with 4th Photonics Global Conference 2015(ICMAT&IUMRS-ICA2015), Singapore, July 1, 2015. |
14 | M. Niwa, "Study of Reliability Physics on High-k/Metal Gate and Power Devices”, 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2015), Hshinchu, Republic of China, June 30, 2015. |
13 | H. Sato, “Properties of CoFeB‐MgO Magnetic Tunnel Junctions with Perpendicular Easy Axis for Spintronics Based VLSI Applications” 2015 Spintronics Workshop on LSI, Kyoto, Japan, June 15, 2015. |
12 | T. Hanyu, “Challenge of MOS/MTJ‐Hybrid Integrated Circuits Based on Non‐Volatile Logic‐in‐Memory Architecture”, 2015 Spintronics Workshop on LSI, Kyoto, Japan, June 15, 2015. |
11 | E. Prati, Y. Chiba, M. Yano, K. Kumagai, M. Hori, G. Ferrari, T. Shinada and T. Tanii, “Single ion implantation of Ge donor impurity in silicon transistors”, 2015 Silicon Nanoelectronics Workshop, Kyoto, Japan, June 14, 2015 |
10 | H. Ohno, “Nanoscale Magnetic Tunnel Junction”, York-Tohoku-Kaiserslautern Symposium on New Conecept Spintronics Devices, York, UK, June 12, 2015. |
9 | H. Sato, Y. Takeuchi, N. Ohshima, S. Kubota, M. Yamanouchi, S. Ikeda, S. Fukami, F. Matsukura and H. Ohno, “Properties of CoFeB-MgO magnetic tunnel junctions with perpendicular easy axis for spintronics based VLSI applications”, 2015 Spintronics workshop on LSI, Kyoto, Japan, June 9, 2015. |
8 | H. Ohno, “Nano-Scale Magnetic Tunnel Junction Materials and Devices - Toward Nonvolatile VLSI - ”, International Conference Spin Physics, Spin Chemistry and Spin Technology, Saint Petersburg, Russia, June 4, 2015. |
7 | H. Ohno, “Nanoscale magnetic tunnel junction”, 5th STT-MRAM Global Innovation Forum, Tokyo, Japan, May 27, 2015. |
6 | T. Endoh, “Nonvolatile Logic and Memory Devices Based on spintronics”, 2015 IEEE International Symposium on Circuits and Systems , Lisbon, Portugal, May 25, 2015. |
5 | H. Ohno, “Spintronic nano-devices for nonvolatile VLSIs”, Frontiers in Quantum Materials and Devices & Tohoku/Harvard Workshop (FQMD2015), Boston, U.S.A, May 21, 2015. |
4 | H. Ohno and S. Fukami, “Three-terminal spintronics memory devices with perpendicular anisotropy”, INTERMAG2015, Beijing, China, May 15, 2015. |
3 | T. Endoh, “Semiconductor Memory (STT-MRAM)”, 2015 International Symposium on VLSI Technology, Systems and Applications , Taiwan, April 28, 2015. |
2 | T. Endoh, “Low Power and High Speed Working Memory with Spintronics and Vertical MOSFET Technology”, COOL Chips XVIII, Yokohama, Japan, April 13-15, 2015. |
1 | T. Hanyu, “Spintronics-Based Nonvolatile Logic-in-Memory Architecture Towards an Ultra-Low-Power VLSI Computing Paradigm”, DATE 2015, Grenoble, France, April 9-13, 2015. |